Why do electronics that fail in the field pass bench tests as “no fault found”?
Electronics that fail in the field and then pass bench tests as “no fault found” usually do so because a solder joint with a fatigue crack propagating through it does not behave like an open circuit. At room temperature, with no load and no vibration, the faces of the solder joint crack remain in contact and the joint conducts normally. Warming the assembly, flexing the circuit board or subjecting it to vibration causes differential expansion that pulls the crack faces apart: the circuit opens and the fault appears. When the unit cools on a test bench, the cracked solder joint closes again.
The failure of a cracked solder joint is therefore conditional on an operating environment that the test bench does not reproduce. A “no fault found” result on returned electronics is very often an accurate statement about the bench test and an inaccurate statement about the hardware.
Why do solder joints in electronic assemblies crack in the first place?
Solder joints crack because solder is a soft metal operating at a high fraction of its melting temperature: it creeps under sustained load and accumulates fatigue damage under cyclic strain. Every power cycle and ambient temperature swing strains the solder joint between a component and a circuit board that expand at different rates. That strain concentrates at the outer corners of larger packages, which is where solder joint cracks typically initiate and why BGA corners are the first place a failure analyst looks.
The solder joint fatigue mechanism is well characterized in the reliability literature, including work on failure behavior during thermal fatigue (IPFA 2009) and on the compounding effect of sequential thermal and vibration exposure (Springer, 2008). Sequential thermal and vibration exposure is closer to what most field hardware actually experiences than either stress alone.
Process conditions established at assembly change the timeline of solder joint failure. Voiding reduces the load-bearing cross-section of a solder joint and concentrates both stress and heat; excessive intermetallic growth creates a brittle layer that fractures under shock rather than fatiguing gracefully. Work on vacuum reflow and its effect on voiding and thermal fatigue performance illustrates how much of field reliability is decided at manufacture (SMTA proceedings).
How do failure analysts find the intermittent fault in a “no fault found” electronic unit?
Failure analysts find the intermittent fault in a “no fault found” electronic unit by running the investigation in a deliberate order, moving from non-destructive to destructive methods. X-ray or CT inspection comes first, because it is non-destructive and can reveal cracks, voids and head-in-pillow defects under packages that cannot be inspected visually. Environmental testing comes next, with thermal cycling or vibration while the unit is monitored electrically, to reproduce the fault under conditions matching service rather than the bench. Only then does the analysis become destructive: dye-and-pry testing distinguishes pre-existing cracks from damage created during removal, followed by metallographic cross-sectioning through the suspect solder joint to expose the crack path and microstructure.
That investigation sequence answers the question that decides the business outcome: is the failure an outlier or a systemic defect? A handful of failed units establishes the failure mechanism. Comparison against unused units from the same lot, and against units from other lots and date codes, establishes the scope of the defect. The difference between an outlier and a systemic defect is the difference between a warranty reserve and a recall.
What should be done with returned electronics suspected of a solder joint failure?
Returned electronic assemblies suspected of a solder joint failure should not be reworked; they should be quarantined with their production records, date codes and traceability intact. Reflowing, desoldering or repairing a returned unit destroys the crack morphology that identifies the failure mechanism and forecloses the failure analysis entirely.
For the full solder joint failure mechanism set and examination protocol, see the Failure Analysis Institute’s specialization area on solder joint failure analysis.